Benefits Better GOI performance means better device yields in the fab Lower COPs mean fewer device killers on the wafer Production volumes available to meet demand Increased demand can be met with minimal leadtimes Extendable beyond 0.18um devices -- ready for the future

Features Lower COP density obtained by controlling the cooling rate during crystal growth Established manufacturing process available at many MEMC sites Commercially established at many MEMC customers with qualification volumes available Competitively priced and better performance than other competitors

Description:
Slow Cool wafers are vacancy-rich wafers where the cooling rate is controlled during crystal growth so that a lower density of vacancy-related defects are nucleated and more time is allowed for vacancy agglomeration.

Technical Details:
The benefits of Slow Cool wafers arise because of the control of the number density and size of vacancy-type defects (COPs, D-Defects). To understand how these benefits arise, it is necessary to understand how vacancies are incorporated into a growing crystal.

It is now generally accepted that the theory of Voronkov(1) holds true in that the concentration of vacancies (V) or interstitials (I) incorporated at the growing solid/liquid interface during crystal growth depends on the ratio of V/G_s, where V is the pull rate of the crystal and G_s is the axial temperature gradient at the melt/solid interface. For values of V/G_s greater than some critical value, C_crit, the dominant point defects incorporated will be vacancies whilst for V/G_s < C_crit, the dominant point defect type will be interstitials. Detailed characterization work at MEMC on crystals that have been grown using various combinations of high and low pull rate profiles has determined that the critical value, C_crit = 2.1x10^-5 cm² s^-1 K^-1. This value is in good agreement with the original value quoted by Voronkov and with other reported values(2).

The value of G_s varies radially and is highest at the crystal surface. This means that V/Gs also varies radially and under certain conditions, it is possible that V/G_s > C_crit in the central crystal portion but < C_crit in the outer portion. In this case, the crystal contains an inner vacancy-type core and an outer interstitial type coaxial region. The region where the point defect changes type from V-rich to I-rich is called a V/I boundary and under certain conditions of crystal cooling and where the interstitial oxygen concentration (O_i) in the crystal is greater than about 6.5x10¹⁷ atoms/cm³(New ASTM calibration³), a ring of oxidation induced stacking faults (OISF) can form just to the inside of this boundary under aggressive oxidation conditions. There also tends to be more oxygen precipitation in the vacancy than the interstitial type region during a subsequent thermal cycle. For certain device applications, it is necessary to ensure that the wafer are uniformly vacancy rich (V/G_s > C_crit at all values of r, where r is the radial distance measured from the wafer center to the edge) to avoid the possible formation of an OISF ring and to ensure that oxygen precipitation is uniform from center to edge.

Slow Cool wafers are, therefore, produced from crystals where V and G_s are controlled to ensure that V/G_s >C_crit at all values of r.

Control of Vacancy Defect Size, Number Density and Impact on GOI
The reduction of COPs and increase in GOI compared with standard wafers occurs because of the advances in the understanding of vacancy agglomeration reactions (see Figure 1).

Point defects are incorporated at the solid/melt interface. For Slow Cool crystals, the dominant point defects incorporated are vacancies. As the crystal cools, the supersaturation of vacancies increases until nucleation of vacancy clusters starts to occur at T~1100°C. The number density of clusters depends on the cooling rate through a narrow temperature range in the vicinity of 1100°C. These vacancies can then grow by the consumption of further isolated vacancies which were not consumed in the initial nucleation phase. Growth of the vacancy clusters takes place in the temperature range ~1100-950°C. It follows that the size of the clusters can be controlled by adjusting the cooling rate through this temperature range(4).

Slow cooling in the temperature range 1100°C-950°C, therefore, results in a low number density of relatively larger vacancy-defects compared with standard material. Figure 2 demonstrates that it is the number density of vacancy type defects (D-Defects - also called Flow Pattern Defects; FPDs) that are important for GOI yields.

References:

1. V. V.Voronkov. J. Cryst Growth, 59, 625, 1982.
2. W. von Ammon, E. Dornberg, H. Oelkrug and H. Weidner. J. Cryst. Growth, 151, 273, 1995.
3. The “New” ASTM calibration is given by 2.45x10¹⁷ a (units of atoms/cm³), where alpha is the absorption coefficient. See the American Society for Testing and Materials (ASTM) method F 1188-93.
4. R.Falster, V.V. Voronkov, J.C. Holzer, S. Markgraf, S. McQuaid and L. Mule’Stagno. Proc. 8th. Int. Symp. On Silicon Materials Science & Technology. “Semiconductor Silicon 1998”. The Electrochemical Society, PV 98-1. p. 468, 1998.