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MDZ®
Flatness
& Nanotopography
Description
Measurement
Role in CMP
Impact of Wafer
Summary & References
Nanotopography -- Summary & References
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Summary

Nanotopography can cause local film removal non-uniformity if a hard pad CMP process is used to planarize a wafer for STI. Ideally, all other factors held constant, one should consider the use of DSP wafers for critical applications where flatness and nanotopography must be satisfied. This will become more important as device CDs shrink and both CMP processing and lithography process steps become yield limiting.


References

  1. J. Schlueter, "Trench Warfare: CMP and Shallow Trench Isolation," Semiconductor International, October 1999.

  2. SEMI DRAFT Document 3089: Guide for Reporting Wafer Nanotopography.

  3. K. V. Ravi "Wafer Flatness Requirements for Future Technologies," Future Fab International, Issue 7, 207.

  4. C. Shan Xu, E. Zhao R. Jairath and W. Krusell, Electrochemical and Solid-State Letters, 1 (4) 181 (1998).

  5. B. Lee, D. Boning, W. Baylies, N. Poduje, P. Hester, Y. Xia, J. Valley, C. Koliopoulus, D. Hetherington, H. Sun, M. Lacy, "Wafer Nanotopography Effects on CMP: Experimental Validation of Modeling Methods," Materials Research Society (MRS) Spring Meeting, San Francisco, CA, April 2001.

  6. D. Boning, B. Lee, W. Baylies, N. Poduje, P. Hester, J. Valley, C. Koliopoulos and D. Hetherington, "Characterization and Modeling of Nanotopography Effects on CMP," International CMP Symposium 2000, Tokyo, Japan, Dec. 4, 2000.

  7. C. Oji, B. Lee, D. Ouma, T. Smith, J. Yoon, J. Chung, and D. Boning, "Wafer Scale Variation of Planarization Length in Chemical Mechanical Polishing," J. Electrochem. Soc. 147 (11) 4307, Nov. 2000.

  8. B. Lee, T. Gan, D. Boning, P. Hester, N. Poduje, and W. Baylies, "Nanotopography Effects on Chemical Mechanical Polishing for Shallow Trench Isolation," Advanced Semiconductor Manufacturing Conference, Boston, MA, Sept. 2000.

  9. N. Tamura, H. Niwa, M. Hatanaka, M. Kase, and T. Fukuda (Fujitsu Limited), "The Influence of Wafer Nanotopology on Residual Film Thickness Variation after Chemical Mechanical Planarization," 197th ECS Meeting, Toronto, Ontario, Canada, May 2000.

  10. T. Tugbawa, T. Park, B. Lee, D. Boning, P. Lefevre, and L. Camilletti, "Modeling of Pattern Dependencies for Multi-Level Copper Chemical-Mechanical Polishing Processes," Materials Research Society (MRS) Spring Meeting, San Francisco, CA, April 2001.

  11. B. Lee, D. Boning, L. Economikos, "A Fixed Abrasive CMP Model," Chemical Mechanical Polish for ULSI Multilevel Interconnection Conference (CMP-MIC 2001), pp. 395-402, Santa Clara, March 2001.

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