A straightforward and reliable process gets the job done in seconds.

When a wafer is heated to high temperatures increasing numbers of silicon atoms leave their lattice sites in the crystal. The numbers that do so are governed by the laws of thermodynamics. When a silicon atom leaves its lattice site it becomes an "interstitial" atom. It leaves behind a "vacancy". Interstitials and vacancies are created in pairs (and thus in equal numbers) in this way -- naturally and predictably simply by heating silicon to a given temperature. Call this "step 1."

In silicon, it turns out, the vacancy is slightly more energetically preferred than the interstitial. Thus in equilibrium there should be more vacancies than interstitials. This is rapidly corrected. Interstitials diffusion phenomenally fast in silicon and the excess interstitials diffuse out to the surfaces of the wafer. After only one or two seconds at temperatures around 1200°C, the wafer has established true temperature dependent equilibrium concentrations of both its vacancies and interstitials. Thus at this stage there is a slight imbalance in the wafer with more vacancies than interstitials. This is critical to the working of the process. Call this stage "step 2". The higher the temperature, the higher the concentration of vacancies. Their concentration is dependent only on temperature. Simple.

As it turns out, the problem is keeping them in the wafer as it cools from the process temperature. As a wafer cools from high temperatures, it tries to keep up with its ever-changing equilibrium state. At lower temperatures, equilibrium requires lower concentrations of vacancies and interstitials. There are two ways the wafer can try to keep up with equilibrium (that is: get rid of the excess vacancies and interstitials) as the wafer cools.

One way is for the intersititial atoms to fall back into the vacancy sites (or "recombine"). But recall that in step one, we created an imbalance in the concentrations of the vacancies and interstitials. There are simply not enough interstitials around anymore to fill all the vacancies. Thus As the wafer cools, the vacancy concentration is reduced in accordance with the dictates of equilibrium by interstitials falling back into vacancies – but only up to the point at which we run out of interstitials. This occurs rapidly - after about 50 degrees of cooling, typically. Cooling further the remaining vacancies become "supersaturated". These are the vacancies that will later be doing our job of enhancing the precipitation of oxygen.

But this is not the end of the story. There is another avenue for some of the vacancies to take in trying to maintain equilibrium. Those vacancies which are sufficiently close to the surface can diffuse there and recombine. The surface of a wafer may be considered to be an infinite sink for excess vacancies (and interstitials). But diffusion from the interior of the wafer to the surface takes time and is limited by how fast the vacancies can be transported there. Thus, depending on the cooling rate, various depths of the silicon beneath the surface are "cleaned out" of vacancies by transport to the surfaces.

If the cooling rate is too slow – such as is always the case with furnace heat treatments, then effectively all of the excess vacancies are cleaned out of the wafer through the surfaces. This is in fact the usual case for a furnace heat treatment. You pretty much end up with what you started with - not many vacancies in your wafer. No matter how many you put in during the high temperature treatment, by the end of the cooling phase they’ve all leaked out again.

But, if the cooling rate is "just right" then the leaking out of vacancies is limited to a useful depth (about 80 microns or so). Call this step 3. This clean-out or low vacancy (and tabula rasa-ed) region becomes the denuded zone. Below the depth at which vacancies can reach the surface during the cooling, rather high concentrations of vacancies can be quenched into the wafer. These become the wildly effective catalysers of subsequent oxygen precipitation and result in the formation of the future gettering layer.

RTP is used to produce the desired vacancy profiles in silicon wafers. The tempertures required to achieve sufficiently large vacancy concentrations are above about 1180°C, and the cooling rates required to keep them there are greater than about 20K/s. This is well within RTP operating ranges.

Figure 1 illustrates steps 2 and 3 of the process.