The AEGIS™ Wafer

The requirements of the sub-0.18 µm IC device generations have driven the development of several lowdefect density silicon wafer alternatives. The AEGIS™ p/p - epi wafer is a high GOI (gate oxide integrity), drop-in replacement for p- polished wafers with intrinsic gettering and no COPs (crystal-originated pits) at the surface and throughout the epi layer thickness. The AEGIS™ wafers are also a replacement for N-doped, annealed or epi wafers. AEGIS™ epi wafers are enhanced using MEMC’s patented Magic Denuded Zone® (MDZ®). MDZ® produces robust internal gettering protection early in the IC fabrication process.

• Cost-effective replacement for N-doped epi, annealed or high performance polished products offering the advantages of a mature technology

• No harmful crystal defects in the epi layer leads to no crystal defect related yields and reliability degradation

• Deep precipitate-free zone through MDZ® maintained throughout customer processing leads to improved device yield and reliability potential

• Built-in IG template through MDZ® eliminates need for customer oxygen out-diffusion and nucleation and reduces customer cycle time