Agglomerated vacancy-related defects are known commonly as D-defects or as COPs when they intersect the wafer surface. Although recent data has shown a decreasing sensitivity of GOI to COPs at gate oxide thickness of less than 100Ĺ, it is believed that the presence of the vacancy-related defects will have a certain impact on device performance and yield.

AEGIS™ wafers yield extremely well due to their very high GOI characteristics resulting from the complete elimination of agglomerated defects (which lead to COPs and interstitial defects) at the surface and in the epi layer.

Intrinsic Gettering

In addition to low COP densities, many customers also require intrinsic gettering. This is achieved in AEGIS™ wafers by using MEMC’s MDZ® patented process. The MDZ® process produces an ideal density of oxygen precipitates and a deep precipitate-free zone. This eliminates the need for additional, costly out-diffusion, nucleation and growth thermal cycles in the customers’ manufacturing lines.

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